View AD534SD883B_8437496.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

pin configurations a ad534 internally trimmed precision ic multiplier features pretrimmed to 6 0.25% max 4-quadrant error (ad534l) all inputs (x, y and z) differential, high impedance for [(x 1 C x 2 ) (y 1 C y 2 )/10 v] + z 2 transfer function scale-factor adjustable to provide up to x100 gain low noise design: 90 m v rms, 10 hzC10 khz low cost, monolithic construction excellent long term stability applications high quality analog signal processing differential ratio and percentage computations algebraic and trigonometric function synthesis wideband, high-crest rms-to-dc conversion accurate voltage controlled oscillators and filters available in chip form rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. to-116 (d-14) package top view (not to scale) 14 13 12 11 10 9 8 1 2 3 4 5 6 7 nc = no connect x1 +v s nc ad534 out z1 z2 nc Cv s x2 nc sf nc y1 y2 to-100 (h-10a) package Cv s +v s out z1 z2 y2 y1 sf x2 x1 ad534 top view (not to scale) lcc (e-20a) package +v s 3 21 20 19 nc x1 x2 nc Cv s nc y2 y1 nc 91011 12 13 4 5 6 7 8 nc nc sf nc nc 18 17 16 15 14 out nc z1 nc z2 ad534 top view (not to scale) nc = no connect product description the ad534 is a monolithic laser trimmed four-quadrant multi- plier divider having accuracy specifications previously found only in expensive hybrid or modular products. a maximum multiplication error of 0.25% is guaranteed for the ad534l without any external trimming. excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried zener reference preserve accuracy even under adverse conditions of use. it is the first multiplier to offer fully differential, high impedance operation on all inputs, including the z-input, a feature which greatly increases its flex- ibility and ease of use. the scale factor is pretrimmed to the standard value of 10.00 v; by means of an external resistor, this can be reduced to values as low as 3 v. the wide spectrum of applications and the availability of several grades commend this multiplier as the first choice for all new designs. the ad534j ( 1% max error), ad534k ( 0.5% max) and ad534l ( 0.25% max) are specified for operation over the 0 c to +70 c temperature range. the ad534s ( 1% max) and ad534t ( 0.5% max) are specified over the extended tempera- ture range, C55 c to +125 c. all grades are available in her- metically sealed to-100 metal cans and to-116 ceramic dip packages. ad534j, k, s and t chips are also available. provides gain with low noise the ad534 is the first general purpose multiplier capable of providing gains up to x100, frequently eliminating the need for separate instrumentation amplifiers to precondition the inputs. the ad534 can be very effectively employed as a variable gain differential input amplifier with high common-mode rejection. the gain option is available in all modes, and will be found to simplify the implementation of many function-fitting algorithms such as those used to generate sine and tangent. the utility of this feature is enhanced by the inherent low noise of the ad534: 90 m v, rms (depending on the gain), a factor of 10 lower than previous monolithic multipliers. drift and feedthrough are also substantially reduced over earlier designs. unprecedented flexibility the precise calibration and differential z-input provide a degree of flexibility found in no other currently available multiplier. standard mdssr functions (multiplication, division, squaring, square-rooting) are easily implemented while the restriction to particular input/output polarities imposed by earlier designs has been eliminated. signals may be summed into the output, with or without gain and with either a positive or negative sense. many new modes based on implicit-function synthesis have been made possible, usually requiring only external passive components. the output can be in the form of a current, if desired, facilitating such operations as integration. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 1999
ad534Cspecifications model ad534j ad534k ad534l min typ max min typ max min typ max units multiplier performance transfer function ( x 1 x 2 )( y 1 y 2 ) 10 v + z 2 ( x 1 x 2 )( y 1 y 2 ) 10 v + z 2 ( x 1 x 2 )( y 1 y 2 ) 10 v + z 2 total error 1 (C10 v x, y +10 v) 6 1.0 6 0.5 6 0.25 % t a = min to max 1.5 1.0 0.5 % total error vs. temperature 0.022 0.015 0.008 %/ c scale factor error (sf = 10.000 v nominal) 2 0.25 0.1 0.1 % temperature-coefficient of scaling voltage 0.02 0.01 0.005 %/ c supply rejection ( 15 v 1v) 0.01 0.01 0.01 % nonlinearity, x (x = 20 v p-p, y = 10 v) 0.4 0.2 6 0.3 0.10 6 0.12 % nonlinearity, y (y = 20 v p-p, x = 10 v) 0.2 0.1 6 0.1 0.005 6 0.1 % feedthrough 3 , x (y nulled, x = 20 v p-p 50 hz) 0.3 0.15 6 0.3 0.05 6 0.12 % feedthrough 3 , y (x nulled, y = 20 v p-p 50 hz) 0.01 0.01 6 0.1 0.003 6 0.1 % output offset voltage 5 6 30 2 6 15 2 6 10 mv output offset voltage drift 200 100 100 m v/ c dynamics small signal bw (v out = 0.1 rms) 1 1 1 mhz 1% amplitude error (c load = 1000 pf) 50 50 50 khz slew rate (v out 20 p-p) 20 20 20 v/ m s settling time (to 1%, d v out = 20 v) 2 2 2 m s noise noise spectral-density sf = 10 v 0.8 0.8 0.8 m v/ ? hz sf = 3 v 4 0.4 0.4 0.4 m v/ ? hz wideband noise f = 10 hz to 5 mhz 1 1 1 mv/rms wideband noise f = 10 hz to 10 khz 90 90 90 m v/rms output output voltage swing 6 11 6 11 6 11 v output impedance (f 1 khz) 0.1 0.1 0.1 w output short circuit current (r l = 0, t a = min to max) 30 30 30 ma amplifier open loop gain (f = 50 hz) 70 70 70 db input amplifiers (x, y and z) 5 signal voltage range (diff. or cm 10 10 10 v operating diff.) 12 12 12 v offset voltage x, y 5 6 20 2 6 10 2 6 10 mv offset voltage drift x, y 100 50 50 m v/ c offset voltage z 5 6 30 2 6 15 2 10 mv offset voltage drift z 200 100 100 m v/ c cmrr 60 80 70 90 70 90 db bias current 0.8 2.0 0.8 2.0 0.8 2.0 m a offset current 0.1 0.1 0.05 0.2 m a differential resistance 10 10 10 m w divider performance transfer function (x 1 > x 2 ) 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 total error 1 (x = 10 v, C10 v z +10 v) 0.75 0.35 0.2 % (x = 1 v, C1 v z +1 v) 2.0 1.0 0.8 % (0.1 v x 10 v, C10 v z 10 v) 2.5 1.0 0.8 % square performance transfer function ( x 1 - x 2 ) 2 10 v + z 2 ( x 1 - x 2 ) 2 10 v + z 2 ( x 1 - x 2 ) 2 10 v + z 2 total error (C10 v x 10 v) 0.6 0.3 0.2 % square-rooter performance transfer function (z 1 z 2 ) 10 v ( z 2 - z 1 ) + x 2 10 v ( z 2 - z 1 ) + x 2 10 v ( z 2 - z 1 ) + x 2 total error 1 (1 v z 10 v) 1.0 0.5 0.25 % power supply specifications supply voltage rated performance 15 15 15 v operating 8 6 18 8 6 18 8 6 18 v supply current quiescent 4 6 4 6 4 6 ma package options to-100 (h-10a) ad534jh ad534kh ad534lh to-116 (d-14) ad534jd ad534kd ad534ld chips ad534k chips (@ t a = + 25 8 c, 6 v s = 15 v, r 3 2k v ) n otes 1 figures given are percent of full scale, 10 v (i.e., 0.01% = 1 mv). 2 may be reduced down to 3 v using external resistor between Cv s and sf. 3 irreducible component due to nonlinearity: excludes effect of offsets. 4 using external resistor adjusted to give sf = 3 v. 5 see functional block diagram for definition of sections. specifications subject to change without notic e. specifications shown in boldface are tested on all production units at final electrical test. results from those tests are used to calculate outgoing quality levels. all min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. rev. b C2C
model ad534s ad534t min typ max min typ max units multiplier performance transfer function ( x 1 x 2 )( y 1 y 2 ) 10 v + z 2 ( x 1 x 2 )( y 1 y 2 ) 10 v + z 2 total error 1 (C10 v x, y +10 v) 6 1.0 6 0.5 % t a = min to max 6 2.0 1.0 % total error vs. temperature 6 0.02 6 0.01 %/ c scale factor error (sf = 10.000 v nominal) 2 0.25 0.1 % temperature-coefficient of scaling voltage 0.02 6 0.005 %/ c supply rejection ( 15 v 1v) 0.01 0.01 % nonlinearity, x (x = 20 v p-p, y = 10 v) 0.4 0.2 6 0.3 % nonlinearity, y (y = 20 v p-p, x = 10 v) 0.2 0.1 6 0.1 % feedthrough 3 , x (y nulled, x = 20 v p-p 50 hz) 0.3 0.15 6 0.3 % feedthrough 3 , y (x nulled, y = 20 v p-p 50 hz) 0.01 0.01 6 0.1 % output offset voltage 5 30 2 6 15 mv output offset voltage drift 500 300 m v/ c dynamics small signal bw (v out = 0.1 rms) 1 1 mhz 1% amplitude error (c load = 1000 pf) 50 50 khz slew rate (v out 20 p-p) 20 20 v/ m s settling time (to 1%, d v out = 20 v) 2 2 m s noise noise spectral-density sf = 10 v 0.8 0.8 m v/ ? hz sf = 3 v 4 0.4 0.4 m v/ ? hz wideband noise f = 10 hz to 5 mhz 1.0 1.0 mv/rms wideband noise f = 10 hz to 10 khz 90 90 m v/rms output output voltage swing 11 11 v output impedance (f 1 khz) 0.1 0.1 w output short circuit current (r l = 0, t a = min to max) 30 30 ma amplifier open loop gain (f = 50 hz) 70 70 db input amplifiers (x, y and z) 5 signal voltage range (diff. or cm 10 10 v operating diff.) 12 12 v offset voltage x, y 5 6 20 2 6 10 mv offset voltage drift x, y 100 150 m v/ c offset voltage z 5 6 30 2 6 15 mv offset voltage drift z 500 300 m v/ c cmrr 60 80 70 90 db bias current 0.8 2.0 0.8 2.0 m a offset current 0.1 0.1 m a differential resistance 10 10 m w divider performance transfer function (x 1 > x 2 ) 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 10 v ( z 2 - z 1 ) ( x 1 - x 2 ) + y 1 total error 1 (x = 10 v, C10 v z +10 v) 0.75 0.35 % (x = 1 v, C1 v z +1 v) 2.0 1.0 % (0.1 v x 10 v, C10 v z 10 v) 2.5 1.0 % square performance transfer function ( x 1 - x 2 ) 2 10 v + z 2 ( x 1 - x 2 ) 2 10 v + z 2 total error (C10 v x 10 v) 0.6 0.3 % square-rooter performance transfer function (z 1 z 2 ) 10 v ( z 2 - z 1 ) + x 2 10 v ( z 2 - z 1 ) + x 2 total error 1 (1 v z 10 v) 1.0 0.5 % power supply specifications supply voltage rated performance 15 15 v operating 8 6 22 8 6 22 v supply current quiescent 4 6 4 6 ma package options to-100 (h-10a) ad534sh ad534th to-116 (d-14) ad534sd ad534td e-20a ad534se chips ad534s chips ad534t chips ad534 n otes 1 figures given are percent of full scale, 10 v (i.e., 0.01% = 1 mv). 2 may be reduced down to 3 v using external resistor between Cv s and sf. 3 irreducible component due to nonlinearity: excludes effect of offsets. 4 using external resistor adjusted to give sf = 3 v. 5 see functional block diagram for definition of sections. specifications subject to change without notice. rev. b C3C s pecifications shown in boldface are tested on all production units at final electrical test. results from those tests are used to calculate outgoing quality levels. all min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
ad534 C4C rev. b absolute maximum ratings ad534j, k, l ad534s, t supply voltage 18 v 22 v internal power dissipation 500 mw * output short-circuit to ground indefinite * input voltages, x 1 x 2 y 1 y 2 z 1 z 2 v s * rated operating temperature range 0 c to +70 c C55 c to +125 c storage temperature range C65 c to +150 c* lead temperature range, 60 s soldering +300 c* *same as ad534j specs. ordering guide model temperature range package description package option ad534jd 0 c to +70 c side brazed dip d-14 ad534kd 0 c to +70 c side brazed dip d-14 ad534ld 0 c to +70 c side brazed dip d-14 ad534jh 0 c to +70 c header h-10a ad534jh/+ 0 c to +70 c header h-10a ad534kh 0 c to +70 c header h-10a ad534kh/+ 0 c to +70 c header h-10a ad534lh 0 c to +70 c header h-10a ad534k chip 0 c to +70 c chip ad534sd C55 c to +125 c side brazed dip d-14 ad534sd/883b C55 c to +125 c side brazed dip d-14 ad534td C55 c to +125 c side brazed dip d-14 ad534td/883b C55 c to +125 c side brazed dip d-14 jm38510/13902bca C55 c to +125 c side brazed dip d-14 jm38510/13901bca C55 c to +125 c side brazed dip d-14 ad534se C55 c to +125 c lcc e-20a ad534se/883b C55 c to +125 c lcc e-20a ad534te/883b C55 c to +125 c lcc e-20a ad534sh C55 c to +125 c header h-10a ad534sh/883b C55 c to +125 c header h-10a ad534th C55 c to +125 c header h-10a ad534th/883b C55 c to +125 c header h-10a jm38510/13902bia C55 c to +125 c header h-10a jm38510/13901bia C55 c to +125 c header h-10a ad534s chip C55 c to +125 c chip ad534t chip C55 c to +125 c chip the rmal c haracteristics thermal resistance q jc = 25 c/w for h-10a q ja = 150 c/w for h-10a q jc = 25 c/w for d-14 or e-20a q ja = 95 c/w for d-14 or e-20a
ad534 rev. b C5C functional description figure 2 is a functional block diagram of the ad534. inputs are converted to differential currents by three identical voltage-to- current converters, each trimmed for zero offset. the product of the x and y currents is generated by a multiplier cell using gilberts translinear technique. an on-chip buried zener provides a highly stable reference, which is laser trimmed to provide an overall scale factor of 10 v. the difference between xy/sf and z is then applied to the high gain output amplifier. this permits various closed loop configurations and dramati- cally reduces nonlinearities due to the input amplifiers, a domi- nant source of distortion in earlier designs. the effectiveness of the new scheme can be judged from the fact that under typical conditions as a multiplier the nonlinearity on the y input, with x at full scale ( 10 v), is 0.005% of fs; even at its worst point, which occurs when x = 6.4 v, it is typically only 0.05% of fs nonlinearity for signals applied to the x input, on the other hand, is determined almost entirely by the multi- plier element and is parabolic in form. this error is a major factor in determining the overall accuracy of the unit and hence is closely related to the device grade. v-1 x 1 x 2 v-1 y 1 y 2 v-1 z 1 z 2 sf ad534 +v s Cv s a out transfer function v o = a C (z 1 C z 2 ) (x 1 C x 2 ) (y 1 C y 2 ) sf high gain output amplifier + C + C + C stable reference and bias translinear multiplier element 0.75 atten figure 2. functional block diagram the generalized transfer function for the ad534 is given by: v out = a ( x 1 - x 2 )( y 1 - y 2 ) sf - ( z 1 - z 2 ) ? ? ? ? where a = open loop gain of output amplifier, typically 70 db at dc x , y , z = input voltages (full scale = sf, peak = 1.25 sf) sf = scale factor, pretrimmed to 10.00 v but adjustable by the user down to 3 v. in most cases the open loop gain can be regarded as infinite, and sf will be 10 v. the operation performed by the ad534, can then be described in terms of equation: ( x 1 - x 2 )( y 1 - y 2 ) = 10 v ( z 1 - z 2 ) the user may adjust sf for values between 10.00 v and 3 v by connecting an external resistor in series with a potentiometer between sf and Cv s . the approximate value of the total resis- tance for a given value of sf is given by the relationship: r sf = 5.4 k sf 10 - sf due to device tolerances, allowance should be made to vary r sf ; by 25% using the potentiometer. considerable reduction in bias currents, noise and drift can be achieved by decreasing sf. this has the overall effect of increasing signal gain without the customary increase in noise. note that the peak input signal is always limited to 1.25 sf (i.e., 5 v for sf = 4 v) so the overall transfer function will show a maximum gain of 1.25. the per- formance with small input signals, however, is improved by using a lower sf since the dynamic range of the inputs is now fully utilized. bandwidth is unaffected by the use of this option. supply voltages of 15 v are generally assumed. however, satisfactory operation is possible down to 8 v (see figure 16). since all inputs maintain a constant peak input capability of 1.25 sf some feedback attenuation will be necessary to achieve output voltage swings in excess of 12 v when using higher supply voltages. operation as a multiplier figure 3 shows the basic connection for multiplication. note that the circuit will meet all specifications without trimming. x 1 x 2 y 1 y 2 z 1 z 2 ad534 = + z 2 (x 1 C x 2 ) (y 1 C y 2 ) 10v output , 6 12v pk x input 6 10v fs 6 12v pk y input 6 10v fs 6 12v pk +15v out Cv s +v s C15v optional summing input, z, 6 10v pk sf figure 3. basic multiplier connection in some cases the user may wish to reduce ac feedthrough to a minimum (as in a suppressed carrier modulator) by applying an external trim voltage ( 30 mv range required) to the x or y input (see figure 1). figure 19 shows the typical ac feedthrough with this adjustment mode. note that the y input is a factor of 10 lower than the x input and should be used in applications where null suppression is critical. the high impedance z 2 terminal of the ad534 may be used to sum an additional signal into the output. in this mode the out- put amplifier behaves as a voltage follower with a 1 mhz small signal bandwidth and a 20 v/ m s slew rate. this terminal should always be referenced to the ground point of the driven system, particularly if this is remote. likewise, the differential inputs should be referenced to their respective ground potentials to realize the full accuracy of the ad534.
ad534 C6C rev. b a much lower scaling voltage can be achieved without any re- duction of input signal range using a feedback attenuator as shown in figure 4. in this example, the scale is such that v out = xy, so that the circuit can exhibit a maximum gain of 10. this connection results in a reduction of bandwidth to about 80 khz without the peaking capacitor c f = 200 pf. in addition, the output offset voltage is increased by a factor of 10 making external adjustments necessary in some applications. adjust- ment is made by connecting a 4.7 m w resistor between z 1 and the slider of a pot connected across the supplies to provide 300 mv of trim range at the output. x 1 x 2 y 1 y 2 z 1 z 2 ad534 x input 6 10v fs 6 12v pk y input 6 10v fs 6 12v pk +15v out Cv s +v s C15v optional peaking capacitor c f = 200pf 90k v 10k v sf output , 6 12v pk = (x 1 C x 2 ) (y 1 C y 2 ) (scale = 1v) figure 4. connections for scale-factor of unity feedback attenuation also retains the capability for adding a signal to the output. signals may be applied to the high imped- ance z 2 terminal where they are amplified by +10 or to the common ground connection where they are amplified by +1. input signals may also be applied to the lower end of the 10 k w resistor, giving a gain of C9. other values of feedback ratio, up to x100, can be used to combine multiplication with gain. occasionally it may be desirable to convert the output to a cur- rent, into a load of unspecified impedance or dc level. for ex- ample, the function of multiplication is sometimes followed by integration; if the output is in the form of a current, a simple capacitor will provide the integration function. figure 5 shows how this can be achieved. this method can also be applied in squaring, dividing and square rooting modes by appropriate choice of terminals. this technique is used in the voltage- controlled low-pass filter and the differentia l-input voltage-to- frequency converter shown in the applications section. x 1 x 2 y 1 y 2 z 1 z 2 ad534 1 rs (x 1 C x 2 ) (y 1 C y 2 ) i out = 10v integrator capacitor (see text) x input 6 10v fs 6 12v pk y input 6 10v fs 6 12v pk out Cv s +v s current-sensing resistor, r s , 2k v min sf figure 5. conversion of output to current operation as a squarer operation as a squarer is achieved in the same fashion as the multiplier except that the x and y inputs are used in parallel. the differential inputs can be used to determine the output polarity (positive for x 1 = y l and x 2 = y 2 , negative if either one of the inputs is reversed). accuracy in the squaring mode is typically a factor of 2 better than in the multiplying mode, the largest errors occurring with small values of output for input below 1 v. if the application depends on accurate operation for inputs that are always less than 3 v, the use of a reduced value of sf is recommended as described in the functional description sec- tion (previous page). alternatively, a feedback attenuator may be used to raise the output level. this is put to use in the differ- ence-of-squares application to compensate for the factor of 2 loss involved in generating the sum term (see figure 8). the difference-of-squares function is also used as the basis for a novel rms-to-dc converter shown in figure 15. the averaging filter is a true integrator, and the loop seeks to zero its input. for this to occur, (v in ) 2 C (v out ) 2 = 0 (for signals whose period is well below the averaging time-constant). hence v out is forced to equal the rms value of v in . the absolute accuracy of this technique is very high; at medium frequencies, and for signals near full scale, it is determined almost entirely by the ratio of the resistors in the inverting amplifier. the multiplier scaling voltage affects only open loop gain. the data shown is typical of performance that can be achieved with an ad534k, but even using an ad534j, this technique can readily provide better than 1% accuracy over a wide frequency range, even for crest-factors in excess of 10.
ad534 rev. b C7C operation as a divider the ad535, a pin-for-pin functional equivalent to the ad534, has guaranteed performance in the divider and square-rooter configurations and is recommended for such applications. figure 6 shows the connection required for division. unlike earlier products, the ad534 provides differential operation on both numerator and denominator, allowing the ratio of two floating variables to be generated. further flexibility results from access to a high impedance summing input to y 1 . as with all dividers based on the use of a multiplier in a feedback loop, the bandwidth is proportional to the denominator magnitude, as shown in figure 23. x 1 x 2 y 1 y 2 z 1 z 2 ad534 10v (z 2 C z 1 ) = (x 1 C x 2 ) output, 6 12v pk + y 1 z input (numerator) 6 10v fs, 6 12v pk x input (denominator) +10v fs +12v pk optional summing input 6 10v pk out Cv s +v s sf + C +15v C15v figure 6. basic divider connection without additional trimming, the accuracy of the ad534k and l is sufficient to maintain a 1% error over a 10 v to 1 v denominator range. this range may be extended to 100:1 by simply reducing the x offset with an externally generated trim voltage (range required is 3.5 mv max) applied to the unused x input (see figure 1). to trim, apply a ramp of +100 mv to +v at 100 hz to both x 1 and z 1 (if x 2 is used for offset adjust- ment, otherwise reverse the signal polarity) and adjust the trim voltage to minimize the variation in the output.* since the output will be near +10 v, it should be ac-coupled for this adjustment. the increase in noise level and reduction in bandwidth preclude operation much beyond a ratio of 100 to 1. as with the multiplier connection, overall gain can be intro- duced by inserting a simple attenuator between the output and y 2 terminal. this option, and the differential-ratio capability of the ad534 are utilized in the percentage-computer application shown in figure 12. this configuration generates an output proportional to the percentage deviation of one variable (a) with respect to a reference variable (b), with a scale of one volt per percent. operation as a square rooter the operation of the ad534 in the square root mode is shown in figure 7. the diode prevents a latching condition which could occur if the input momentarily changes polarity. as shown, the output is always positive; it may be changed to a negative output by reversing the diode direction and interchang- ing the x inputs. since the signal input is differential, all combi- nations of input and output polarities can be realized, but operation is restricted to the one quadrant associated with each combination of inputs. x 1 x 2 y 1 y 2 z 1 z 2 ad534 output, 6 12v pk 10v (z 2 C z 1 ) +x 2 = z input 10v fs 12v pk optional summing input, x, 6 10v pk out Cv s +v s sf +15v C15v reverse this and x inputs for negative outputs r l (must be provided) + C figure 7. square-rooter connection in contrast to earlier devices, which were intolerant of capacitive loads in the square root modes, the ad534 is stable with all loads up to at least 1000 pf. for critical applications, a small adjustment to the z input offset (see figure 1) will improve accuracy for inputs below 1 v. *see the ad535 data sheet for more details.
ad534Capplications section C8C the versatility of the ad534 allows the creative designer to implement a variety of circuits such as wattmeters, frequency doublers and automatic gain controls to name but a few. x 1 x 2 y 1 y 2 z 1 z 2 ad534 output = a 2 C b 2 10v out Cv s +v s sf +15v C15v a C b 2 a b a + b 2 30k v 10k v figure 8. difference-of-squares x 1 x 2 y 1 y 2 z 1 z 2 ad534 output, 6 12v pk = e c e s 0.1v out Cv s +v s sf +15v C15v signal input, e s , 6 5v pk 39k v 1k v 0.005 m f Cv s control input, e c , zero to 6 5v set gain 1k v 2k v notes: 1) gain is x 10 per-volt of e c , zero to x 50 2) wideband (10hz C 30khz) output noise is 3mv rms, typ corresponding to a.f.s. s/n ratio of 70db 3) noise referred to signal input, with e c = 6 5v, is 60 m v rms, typ 4) bandwith is dc to 20khz, C3db, independent of gain figure 9. voltage-controlled amplifier x 1 x 2 y 1 y 2 z 1 z 2 ad534 output = (10v) sin u out Cv s +v s sf +15v C15v 4.7k v 4.3k v 18k v 10k v using close tolerance resistors and ad534l, accuracy of fit is within 6 0.5% at all points. u is in radians. input, e u 0 to +10v where u = p e u 2 10v 3k v figure 10. sine-function generator x 1 x 2 y 1 y 2 z 1 z 2 output = 1 6 e c sin v t 10v e m out Cv s +v s sf +15v C15v the sf pin or a z-attenuator can be used to provide overall signal amplification, operation from a single supply possible; bias y 2 to v s /2. carrier input e c sin v t modulation input, 6 e m ad534 figure 11. linear am modulator 9k v 1k v x 1 x 2 y 1 y 2 z 2 z 1 ad534 output = (100v) b a C b (1% per volt) out Cv s +v s sf +15v C15v other scales, from 10% per volt to 0.1% per volt can be obtained by altering the feedback ratio. b input (+v e only) a input ( 6 ) figure 12. percentage computer x 1 x 2 y 1 y 2 z 1 z 2 output, 6 5v/pk = (10v) 1 + y y (10v) y where y = out Cv s +v s sf +15v C15v input, y 6 10v fs ad534 figure 13. bridge-linearization function
ad534 rev. b C9C x 1 x 2 y 1 y 2 z 1 z 2 ad534 pins 5, 6, 8 to +15v pins 1, 4 to C15v e c 1 40 cr f = out Cv s +v s sf +15v C15v control input, e c 100mv to 10v 500 v 2.2k v 2 3 7 (= r) adj 1khz +15v adj 8khz 82k v 39k v 3-30p 0.01 (= c) ad211 = 1khz per volt with values shown output 6 15v approx. 2k v C + calibration procedure: with e c = 1.0v, adjust pot to set f = 1.000khz. with e c = 8.0v adjust trimmer capacitor to set f = 8.000khz. linearity will typically be within 6 0.1% of fs for any other input. due to delays in the comparator, this technique is not suitable for maximum frequencies above 10khz. for frequencies above 10khz the ad537 voltage-to-frequency converter is recommended. a triangle-wave of 6 5v pk appears across the 0.01 m f capacitor; if used as an output, a voltage-follower should be interposed. figure 14. differential-input voltage-to-frequency converter rms + dc ac rms x 1 x 2 y 1 y 2 z 1 z 2 ad534 out Cv s +v s sf C + 10k v C + 10k v 20k v +15v 10k v 10k v 10m v 5k v ad741k ad741j 10 m f solid ta + output 0 to +5v 20k v C15v zero adj +15v 10 m f nonpolar input 5v rms fs 6 10v peak matched to 0.025% 10k v mode calibration procedure: with 'mode' switch in 'rms + dc' position, apply an input of +1.00vdc. adjust zero until output reads same as input. check for inputs of 6 10v; output should be within 6 0.05% (5mv). accuracy is maintained from 60hz to 100khz, and is typically high by 0.5% at 1mhz for v in = 4v rms (sine, square or triangular-wave). provided that the peak input is not exceeded, crest-factors up to at least ten have no appreciable effect on accuracy . input impedance is about 10k v ; for high (10m v ) impedance, remove mode switch and input coupling components. for guaranteed specifications the ad536a and ad636 are offered as a single package rms-to-dc converter. figure 15. wideband, high-crest factor, rms-to-dc converter
ad534Ctypical performance curves C10C (typical at +25 8 c, with v s = 6 15 v dc, unless otherwise noted) 100 10 1 frequency C hz 0.1 pk-pk feedthrough C mv y-feedthrough x-feedthrough 1000 10 100 1k 10k 100k 1m 10m figure 19. ac feedthrough vs. frequency 1.5 1 0.5 frequency C hz 0 noise spectral density C m v/ hz scaling voltage = 10v scaling voltage = 3v 10 100 1k 10k 100k figure 20. noise spectral density vs. frequency 100 90 80 70 60 50 2.5 5 7.5 10 scaling voltage, sf C volts conditions: 10hz C 10khz bandwidth output noise voltage C m v rms figure 21. wideband noise vs. scaling voltage 14 12 10 8 6 4 8 10 12 14 16 18 20 positive or negative supply C volts peak positive or negative signal C volts output, r l 2k v all inputs, sf = 10v figure 16. input/output signal range vs. supply voltages 800 700 600 500 400 300 200 100 C60 C40 C20 0 20 40 60 80 100 120 140 temperature C 8 c 0 bias current C na scaling voltage = 10v scaling voltage = 3v figure 17. bias currents vs. temperature (x, y or z inputs) 90 80 70 60 50 30 20 10 frequency C hz 40 0 cmrr C db typical for all inputs 100 1k 10k 100k 1m figure 18. common-mode rejection ratio vs. frequency
ad534 rev. b C11C 0 C10 frequency C hz C20 output response C db 0db = 0.1v rms, r l = 2k v C30 with x10 feedback attenuator c l = 0pf c l 1000pf c f 200pf c l 1000pf c f = 0 10 10k 100k 1m 10m normal connection figure 22. frequency response as a multiplier ( ) +20 0 +40 1k 10k 100k 1m 10m frequency C hz C20 output C db v o v z v x = 10v dc v z = 1v rms v x = 1v dc v z = 100mv rms v x = 100mv dc v z = 10mv rms +60 figure 23. frequency response vs. divider denominator input voltage
ad534 C12C rev. b outline dimensions dimensions shown in inches and (mm). printed in u.s.a. c495eC0C6/99 h-10a package to-100 36 8 0.034 (0.86) 0.028 (0.71) 0.045 (1.14) 0.029 (0.74) 0.115 (2.92) 6 8 5 7 1 4 2 3 9 10 reference plane seating plane 0.355 (9.02) 0.305 (7.75) 0.562 (14.30) 0.500 (12.70) 0.370 (9.40) 0.335 (8.51) 0.044 (1.12) 0.032 (0.81) 0.019 (0.48) 0.016 (0.41) 0.021 (0.53) 0.016 (0.41) 0.185 (4.70) 0.165 (4.19) (dim. a) (dim. b) 0.040 (1.01) 0.010 (0.25) 0.23 (5.84) d-14 package to-116 pin 1 0.029 6 0.010 (7.37 6 0.25) 0.040 r (1.02) 8 7 14 1 0.047 6 0.007 0.100 (2.54) 0.035 6 0.010 0.89 6 0.25 0.700 6 0.010 17.78 6 0.25 0.430 (10.92) 0.265 (6.73) 0.125 (3.18) min +0.003 C0.002 0.017 +0.080 C0.050 0.430 0.180 6 0.030 4.57 6 0.76 0.085 (2.16) 0.10 6 0.002 (0.25 6 0.05) 0.31 6 0.01 (7.87 6 0.25) 0.095 (2.41) 0.30 (7.62) ref e-20a package lcc 0.200 (5.08) bsc 0.100 (2.54) 0.060 (1.52) 0.358 (9.09) 0.342 (8.69) 0.075 (1.91) ref bottom view 0.015 (0.38) min pin 1 0.028 (0.71) 0.022 (0.56) 0.100 (2.54) bsc 0.055 (1.40) 0.045 (1.14) 0.050 (1.27) bsc 0.040 ref 3 45 8 (1.02 3 45 8 ) 3 places 0.020 ref 3 45 8 (0.51 3 45 8 )

▲Up To Search▲

Price & Availability of AD534SD883B

	To Download AD534SD883B Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .